CONTACT:

Ariffin Datuk Yahaya
ariffin@ics.uci.edu

Project Status

1. Architecture Design.

We have completed a design of the iREX architecture and its associated protocol. We also have a simulator that implements the architecture. Simulation results show that iREX

2. Architecture Validation.

We are in the process of validating the viability of the architecture in three ways a) empirical comparisons, b) mathematical modeling, and c) economic modeling.

3. Architecture Deployment.

We are currently exploring collaborations with industry to jointly develop an implementation that can be deployed on the Internet. If you are interested in this, please contact us.

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This research is supported by the NSF through grants ANI-0083074, ANI-9903427 and ANI-0508506, by DARPA through grant MDA972-99-1-0007, by AFOSR through grant MURI F49620-00-1-0330, and by grants from the California MICRO and CoRe programs, Hitachi, Hitachi America, Hitachi CRL, Hitachi SDL, DENSO IT Laboratory, NICT (National Institute of Communication Technology, Japan), Nippon Telegraph and Telephone (NTT), NTT Docomo, NS Solutions Corporation, Fujitsu and Novell.